Quantum computing is rapidly evolving from a basic science activity of university labs towards an enterprise with high-rising market projections, strongly increasing investments and with startups and large enterprises assessing quantum use-cases in their business sectors. In contrast to classical computers, however, quantum processors must cope with the errors that occur during computations, which limits the complexity of algorithms that can currently be run on these systems. There are two basic strategies to address this issue:
The first direction is to reduce the error rates by improving the fidelity of quantum gate operations at the hardware level by better qubit control, materials and processor packaging. In this area, impressive improvements have been made in the various quantum hardware platforms. The second option is to measure the impact of errors on quantum operations and directly correct them, with the ultimate goal of realizing a fully error-corrected universal quantum computer that can run arbitrary algorithms. In between these two extremes, the impact of errors on quantum applications can be mitigated without full error correction, which requires bringing together physical understanding of errors and algorithmic insights.
This WE-Heraeus Seminar addresses these crucial topics and brings together leading quantum scientists from academia and industry concentrating on four potentially scalable quantum architectures – ion traps, superconducting qubits, spin qubits in quantum dots and neutral atoms. The seminar will focus on recent improvements in gate fidelities and quantum control, error mitigation strategies, error detection, fast feedback and developments in error protection using error resilient encodings and stabilizer codes. Furthermore, the seminar aims to discuss advances in error correction algorithms that can be applied to currently available quantum hardware to connect theoretical predictions with experimental realization on the path towards universal quantum computing.